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Influence of the drain bias and gate length ofpartially depleted SOI MOSFETs on the ZTC niasing point

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dc.contributor.authorCamillo, L.M.
dc.contributor.authorMartino, J.A.
dc.contributor.authorSimoen, Eddy
dc.contributor.authorClaeys, Cor
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.date.accessioned2021-10-17T06:25:52Z
dc.date.available2021-10-17T06:25:52Z
dc.date.embargo9999-12-31
dc.date.issued2008
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/13471
dc.source.beginpage243
dc.source.conferenceMicroelectronics Technology and Devices - SBMicro
dc.source.conferencedate3/09/2008
dc.source.conferencelocationGramada Brazil
dc.source.endpage252
dc.title

Influence of the drain bias and gate length ofpartially depleted SOI MOSFETs on the ZTC niasing point

dc.typeProceedings paper
dspace.entity.typePublication
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