2026 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, ISSCC
Abstract
The paper presents a 256 -channel solid-state nanopore readout IC in 65 nm CMOS. A new integrate-and-hold TIA cuts per-pore power and area >6× while achieving 1 MHz BW and 193 pArms at 10 nA. Event detection with dynamic slot allocation exploits sub-1 percent activity to reduce ADC data 32×. The chip delivers 1 mW and 0.019 mm2 per pore and records labeled DNA translocations, enabling scalable, low-cost single-molecule diagnostics.
