Publication:

High NA: Enabling Single Exposure for Metal Logic Designs

Date

 
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.orcid#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.orcid0000-0002-6314-2685
cris.virtual.orcid0000-0002-1086-270X
cris.virtual.orcid0009-0001-2424-1322
cris.virtual.orcid0000-0003-4308-0381
cris.virtual.orcid0000-0003-0803-4267
cris.virtual.orcid0000-0002-3571-1633
cris.virtual.orcid0009-0008-3347-0072
cris.virtual.orcid0009-0005-4824-0411
cris.virtual.orcid0000-0003-1830-1226
cris.virtual.orcid0009-0009-3247-3252
cris.virtualsource.department9a465fde-8e0c-47f6-8574-f40fd957420c
cris.virtualsource.department1fc7b9f7-9367-45d8-be12-90bcb20ebcbd
cris.virtualsource.departmentf9ae71b7-6a7c-4af7-9261-89511f8785c1
cris.virtualsource.departmentb4f8c238-ae6a-4a36-b09f-6a93bec3afa5
cris.virtualsource.department88d4cdb2-8ec4-4aa4-87ee-9719850d7416
cris.virtualsource.department987ea135-86ab-40b5-a86e-f94391ccf5fe
cris.virtualsource.departmentd407aca5-93a7-41d4-8f49-f8789954593d
cris.virtualsource.departmenteb7fb00b-94f8-4c18-90c7-1014438b19ae
cris.virtualsource.department34111beb-7a3a-4530-b662-de0bc5f7d47c
cris.virtualsource.department88ecd5bb-ecd6-444c-9139-df56de2c1bd1
cris.virtualsource.department57507ba7-1ade-47a6-93e7-ea2b7474cc88
cris.virtualsource.orcid9a465fde-8e0c-47f6-8574-f40fd957420c
cris.virtualsource.orcid1fc7b9f7-9367-45d8-be12-90bcb20ebcbd
cris.virtualsource.orcidf9ae71b7-6a7c-4af7-9261-89511f8785c1
cris.virtualsource.orcidb4f8c238-ae6a-4a36-b09f-6a93bec3afa5
cris.virtualsource.orcid88d4cdb2-8ec4-4aa4-87ee-9719850d7416
cris.virtualsource.orcid987ea135-86ab-40b5-a86e-f94391ccf5fe
cris.virtualsource.orcidd407aca5-93a7-41d4-8f49-f8789954593d
cris.virtualsource.orcideb7fb00b-94f8-4c18-90c7-1014438b19ae
cris.virtualsource.orcid34111beb-7a3a-4530-b662-de0bc5f7d47c
cris.virtualsource.orcid88ecd5bb-ecd6-444c-9139-df56de2c1bd1
cris.virtualsource.orcid57507ba7-1ade-47a6-93e7-ea2b7474cc88
dc.contributor.authorDas, Shubhankar
dc.contributor.authorBlanco, Victor
dc.contributor.authorJambaldinni, Shruti
dc.contributor.authorSaha, Arup
dc.contributor.authorDe Silva Anuja
dc.contributor.authorFranke, Joern-Holger
dc.contributor.authorHasan, Mahmudul
dc.contributor.authorRoy, Syamashree
dc.contributor.authorSangghaleh, Mahtab
dc.contributor.authorKampitakis, Viktor
dc.contributor.authorVan de Kerkhove, Jeroen
dc.contributor.authorDe Poortere, Etienne
dc.contributor.authorO'Toole, Martin
dc.contributor.authorWise, Rich
dc.contributor.authorVanelderen, Pieter
dc.contributor.authorVandenberghe, Geert
dc.contributor.authorRonse, Kurt
dc.contributor.authorHalder, Sandip
dc.contributor.authorLeray, Philippe
dc.date.accessioned2026-09-03T12:52:54Z
dc.date.available2026-09-03T12:52:54Z
dc.date.createdwos2026
dc.date.issued2026
dc.description.abstractWe will present a detailed study on pitch 20 nm (P20) and pitch 18 nm (P18) metal logic designs, including regular tip-to-tip (T2T) and logic structures for bright field (BF) mask design in combination with dry metal-oxide-resist. We show the performance of such structures for various pupils and dry resist processing combinations. The highlight of P20 T2T structure is that we can print 13 nm T2T-CD (critical dimension) with local CD uniformity (LCDU) < 3nm, whereas P18 nm structure can be printed with T2T-CD 18 nm having LCDU < 3 nm in a single High-NA EUV exposure. Further, using directional etch technique at resist, in P18 T2T structure we can even push T2T-CD to ~9 nm with LCDU ~ 3 nm. To align the study further with industrial applications, we explore large area defectivity analysis through e-beam inspection for P20 metal logic structure after stack etch. We believe our results will promote single patterning technology for metal logic design for damascene process.
dc.description.wosFundingTextThis work has been enabled in part by the NanoIC pilot line. The acquisition and operation are jointly funded by the Chips Joint Undertaking, through the European Union's Digital Europe (101183266) and Horizon Europe programs (101183277), as well as by the participating states Belgium (Flanders), France, Germany, Finland, Ireland and Romania. For more information, visit nanoic-project.eu.
dc.identifier.doi10.1117/12.3091662
dc.identifier.isbn978-1-5106-9904-5
dc.identifier.issn0277-786X
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/60203
dc.language.isoeng
dc.provenance.editstepusergreet.vanhoof@imec.be
dc.publisherSPIE-INT SOC OPTICAL ENGINEERING
dc.source.beginpage139791E
dc.source.conferenceOptical and EUV Nanolithography XXXIX,
dc.source.conferencedate2026-02-22
dc.source.conferencelocationSan Jose
dc.source.journalOPTICAL AND EUV NANOLITHOGRAPHY XXXIX
dc.source.numberofpages13
dc.title

High NA: Enabling Single Exposure for Metal Logic Designs

dc.typeProceedings paper
dspace.entity.typePublication
imec.internal.crawledAt2026-07-14
imec.internal.sourcecrawler
imec.internal.wosCreatedAt2026-07-14
Files
Publication available in collections: