Publication:
Simulation of nanofloating gate memory with stacked high-k gate dielectrics
Date
| dc.contributor.author | Govoreanu, Bogdan | |
| dc.contributor.author | Blomme, Pieter | |
| dc.contributor.author | Van Houdt, Jan | |
| dc.contributor.author | De Meyer, Kristin | |
| dc.contributor.imecauthor | Govoreanu, Bogdan | |
| dc.contributor.imecauthor | Blomme, Pieter | |
| dc.contributor.imecauthor | Van Houdt, Jan | |
| dc.contributor.imecauthor | De Meyer, Kristin | |
| dc.contributor.orcidimec | Van Houdt, Jan::0000-0003-1381-6925 | |
| dc.date.accessioned | 2021-10-15T04:50:16Z | |
| dc.date.available | 2021-10-15T04:50:16Z | |
| dc.date.issued | 2003 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/7627 | |
| dc.source.beginpage | 299 | |
| dc.source.conference | IEEE International Conference on Simulation of Semiconductor Processes and Devices - SISPAD | |
| dc.source.conferencedate | 3/09/2003 | |
| dc.source.conferencelocation | Boston USA | |
| dc.source.endpage | 302 | |
| dc.title | Simulation of nanofloating gate memory with stacked high-k gate dielectrics | |
| dc.type | Proceedings paper | |
| dspace.entity.type | Publication | |
| Files | ||
| Publication available in collections: |