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L-shape spacer architecture for low cost, high performance CMOS

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dc.contributor.authorAugendre, Emmanuel
dc.contributor.authorPerello, Carles
dc.contributor.authorVandamme, Ewout
dc.contributor.authorPochet, Sandrine
dc.contributor.authorRooyackers, Rita
dc.contributor.authorBeckx, Stephan
dc.contributor.authorde Potter de ten Broeck, Muriel
dc.contributor.authorLauwers, A.
dc.contributor.authorBadenes, Gonçal
dc.contributor.imecauthorBeckx, Stephan
dc.contributor.imecauthorde Potter de ten Broeck, Muriel
dc.date.accessioned2021-10-14T16:36:18Z
dc.date.available2021-10-14T16:36:18Z
dc.date.issued2001
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/5020
dc.source.beginpage297
dc.source.conferenceULSI Process Integration II; 26 March 2001; Washington, D.C., USA.
dc.source.conferencelocation
dc.source.endpage304
dc.title

L-shape spacer architecture for low cost, high performance CMOS

dc.typeProceedings paper
dspace.entity.typePublication
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