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Pseudo two-dimensional model for double gate tunnel FET considering the junctions depletion regions

Date

2010
Journal article
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dc.contributor.authorGarcia Bardon, Marie
dc.contributor.authorPereira Neves, Hercules
dc.contributor.authorPuers, Bob
dc.contributor.authorVan Hoof, Chris
dc.contributor.imecauthorGarcia Bardon, Marie
dc.contributor.imecauthorPuers, Bob
dc.contributor.imecauthorVan Hoof, Chris
dc.date.accessioned2021-10-18T16:27:48Z
dc.date.available2021-10-18T16:27:48Z
dc.date.embargo9999-12-31
dc.date.issued2010
dc.identifier.issn0018-9383
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/17128
dc.source.beginpage827
dc.source.endpage834
dc.source.issue4
dc.source.journalIEEE Transactions on Electron Devices
dc.source.volume57
dc.title

Pseudo two-dimensional model for double gate tunnel FET considering the junctions depletion regions

dc.typeJournal article
dspace.entity.typePublication
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