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Performance, Energy and NVM Lifetime-Aware Data Structure Refinement and Placement for Heterogeneous Memory Systems

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cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.orcid0000-0002-3599-8515
cris.virtualsource.department7a992f6f-feea-493d-b4d8-c297450cff52
cris.virtualsource.orcid7a992f6f-feea-493d-b4d8-c297450cff52
dc.contributor.authorKatsaragakis, Manolis
dc.contributor.authorBaloukas, Christos
dc.contributor.authorPapadopoulos, Lazaros
dc.contributor.authorCatthoor, Francky
dc.contributor.authorSoudris, Dimitrios
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.date.accessioned2025-07-27T03:57:18Z
dc.date.available2025-07-27T03:57:18Z
dc.date.issued2025
dc.description.abstractThe need for increased memory capacity, which also needs to be affordable and sustainable, leads to the adoption of heterogeneous memory hierarchies, combining DRAM and NVM technologies. This work proposes a memory management methodology that relies on multi-objective optimization in terms of performance, energy consumption and impact on NVM’s lifetime, for applications deployed on heterogeneous (i.e., DRAM/NVM) memory systems. We propose a scalable and lightweight data structure exploration flow for supporting data type refinement based on access pattern analysis, enhanced with a weighted-based data placement decision support for multi-objective exploration and optimization. The evaluation of the methodology was performed both on emulated and real DRAM/NVM hardware for different applications and data placement algorithms. The experimental results show up to 58.7% lower execution time and 48.3% less energy consumption compared with the results obtained by the initial versions of the applications. Moreover, we observed 72.6% less NVM write operations, which can significantly extend the lifetime of the NVM memory. Finally, thorough evaluation shows that the methodology is flexible and scalable, as it can integrate different data placement algorithms and NVM technologies and requires reasonable exploration time.
dc.description.wosFundingTextThis work has received funding from the EU Horizon Europe programme PRIVATEER under Grant Agreement No. 101096110.
dc.identifier.doi10.1145/3736174
dc.identifier.issn1544-3566
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/45940
dc.publisherASSOC COMPUTING MACHINERY
dc.source.beginpage80
dc.source.issue2
dc.source.journalACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION
dc.source.numberofpages27
dc.source.volume22
dc.subject.keywordsOPTIMIZATION
dc.subject.keywordsALLOCATION
dc.subject.keywordsMIGRATION
dc.title

Performance, Energy and NVM Lifetime-Aware Data Structure Refinement and Placement for Heterogeneous Memory Systems

dc.typeJournal article
dspace.entity.typePublication
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