Publication:
Trade-off analysis between gm/I-D and f(T) of nanosheet NMOS transistors with different metal gate stack at high temperature
| dc.contributor.author | Silva, Vanessa C. P. A. | |
| dc.contributor.author | Martino, Joao A. | |
| dc.contributor.author | Simoen, Eddy | |
| dc.contributor.author | Veloso, Anabela | |
| dc.contributor.author | Agopian, Paula G. D. | |
| dc.contributor.imecauthor | Simoen, Eddy | |
| dc.contributor.imecauthor | Veloso, Anabela | |
| dc.contributor.orcidimec | Simoen, Eddy::0000-0002-5218-4046 | |
| dc.date.accessioned | 2022-12-01T10:02:21Z | |
| dc.date.available | 2022-05-10T02:20:05Z | |
| dc.date.available | 2022-12-01T10:02:21Z | |
| dc.date.issued | 2022 | |
| dc.description.wosFundingText | The authors acknowledge CNPq and CAPES for the financial support. S. Barraud for the discussions and imec for providing the nanosheet transistors that have been processed in the frame of imec's Core Partner Program on Logic Devices. | |
| dc.identifier.doi | 10.1016/j.sse.2022.108267 | |
| dc.identifier.issn | 0038-1101 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/39783 | |
| dc.publisher | PERGAMON-ELSEVIER SCIENCE LTD | |
| dc.source.beginpage | 108267 | |
| dc.source.endpage | na | |
| dc.source.issue | na | |
| dc.source.journal | SOLID-STATE ELECTRONICS | |
| dc.source.numberofpages | 8 | |
| dc.source.volume | 191 | |
| dc.subject.keywords | MOSFET | |
| dc.title | Trade-off analysis between gm/I-D and f(T) of nanosheet NMOS transistors with different metal gate stack at high temperature | |
| dc.type | Journal article | |
| dspace.entity.type | Publication | |
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