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Design of a 150 mV supply, 2 MIPS, 90nm CMOS, ultra-low-power microprocessor

Date

2013
Proceedings Paper
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dc.contributor.authorWeckx, Pieter
dc.contributor.authorReynders, Nele
dc.contributor.authorde Mofferts, Ilse
dc.contributor.authorDehaene, Wim
dc.contributor.imecauthorWeckx, Pieter
dc.contributor.imecauthorDehaene, Wim
dc.date.accessioned2021-10-21T14:32:53Z
dc.date.available2021-10-21T14:32:53Z
dc.date.embargo9999-12-31
dc.date.issued2013
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/23386
dc.source.beginpage175
dc.source.conferenceIntegrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation - PATMOS 2012
dc.source.conferencedate4/09/2012
dc.source.conferencelocationNewcastle UK
dc.source.endpage184
dc.title

Design of a 150 mV supply, 2 MIPS, 90nm CMOS, ultra-low-power microprocessor

dc.typeProceedings paper
dspace.entity.typePublication
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