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Process and device design influence on the ESD performance of a fully silicided 0.25mm CMOS technology
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Process and device design influence on the ESD performance of a fully silicided 0.25mm CMOS technology
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Date
1997
Proceedings Paper
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APA
Chicago
Harvard
IEEE
Basic data
APA
Chicago
Harvard
IEEE
Author(s)
Bock, Karlheinz
;
Russ, Christian
;
Badenes, Gonçal
;
Groeseneken, Guido
;
Deferm, Ludo
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Abstract
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1939
since deposited on 2021-09-30
1
last month
Acq. date: 2025-12-10
Citations
Metrics
Views
1939
since deposited on 2021-09-30
1
last month
Acq. date: 2025-12-10
Citations