Publication:

Evaluation of Nanosheet and Forksheet Width Modulation for Digital IC Design in the Sub-3 nm Era

Date

2022
Journal article
https://doi.org/10.1109/TVLSI.2022.3190080
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dc.contributor.authorSisto, Giuliano
dc.contributor.authorZografos, Odysseas
dc.contributor.authorChehab, Bilal
dc.contributor.authorKakarla, Naveen
dc.contributor.authorXiang, Yang
dc.contributor.authorMilojevic, Dragomir
dc.contributor.authorWeckx, Pieter
dc.contributor.authorHellings, Geert
dc.contributor.authorRyckaert, Julien
dc.contributor.imecauthorSisto, Giuliano
dc.contributor.imecauthorZografos, Odysseas
dc.contributor.imecauthorChehab, Bilal
dc.contributor.imecauthorKakarla, Naveen
dc.contributor.imecauthorXiang, Yang
dc.contributor.imecauthorMilojevic, Dragomir
dc.contributor.imecauthorWeckx, Pieter
dc.contributor.imecauthorHellings, Geert
dc.contributor.imecauthorRyckaert, Julien
dc.contributor.orcidimecSisto, Giuliano::0000-0001-8706-4311
dc.contributor.orcidimecZografos, Odysseas::0000-0002-9998-8009
dc.contributor.orcidimecXiang, Yang::0000-0003-0091-6935
dc.contributor.orcidimecHellings, Geert::0000-0002-5376-2119
dc.date.accessioned2023-03-17T08:53:05Z
dc.date.available2022-07-31T02:29:16Z
dc.date.available2023-03-17T08:53:05Z
dc.date.embargo2022-10-31
dc.date.issued2022
dc.identifier.doi10.1109/TVLSI.2022.3190080
dc.identifier.issn1063-8210
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/40186
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
dc.source.beginpage1497
dc.source.endpage1506
dc.source.issue10
dc.source.journalIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
dc.source.numberofpages10
dc.source.volume30
dc.title

Evaluation of Nanosheet and Forksheet Width Modulation for Digital IC Design in the Sub-3 nm Era

dc.typeJournal article
dspace.entity.typePublication
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