Stress memorization technique – fundamental understanding and low-cost integration for advanced CMOS technology using a nonselective process

dc.contributor.author	Ortolland, Claude
dc.contributor.author	Okuno, Yasutoshi
dc.contributor.author	Verheyen, Peter
dc.contributor.author	Kerner, Christoph
dc.contributor.author	Stapelmann, Chris
dc.contributor.author	Aoulaiche, Marc
dc.contributor.author	Horiguchi, Naoto
dc.contributor.author	Hoffmann, Thomas Y.
dc.contributor.imecauthor	Verheyen, Peter
dc.contributor.imecauthor	Kerner, Christoph
dc.contributor.imecauthor	Horiguchi, Naoto
dc.contributor.orcidimec	Horiguchi, Naoto::0000-0001-5490-0416
dc.contributor.orcidimec	Verheyen, Peter::0000-0002-8245-9442
dc.date.accessioned	2021-10-18T01:18:52Z
dc.date.available	2021-10-18T01:18:52Z
dc.date.issued	2009
dc.identifier.issn	0018-9383
dc.identifier.uri	https://imec-publications.be/handle/20.500.12860/15950
dc.source.beginpage	1690
dc.source.endpage	1697
dc.source.issue	8
dc.source.journal	IEEE Transactions on Electron Devices
dc.source.volume	56
dc.title	Stress memorization technique – fundamental understanding and low-cost integration for advanced CMOS technology using a nonselective process
dc.type	Journal article
dspace.entity.type	Publication
Files
Publication available in collections:	Articles