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An Event-driven Recurrent Spiking Neural Network Architecture for Efficient Inference on FPGA

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dc.contributor.authorSankaran, Anand
dc.contributor.authorDetterer, Paul
dc.contributor.authorKannan, Kalpana
dc.contributor.authorAlachiotis, Nikolaos
dc.contributor.authorCorradi, Federico
dc.contributor.imecauthorSankaran, Anand
dc.contributor.imecauthorDetterer, Paul
dc.contributor.imecauthorKannan, Kalpana
dc.contributor.imecauthorCorradi, Federico
dc.contributor.orcidimecCorradi, Federico::0000-0002-5868-8077
dc.date.accessioned2023-12-06T09:42:49Z
dc.date.available2023-11-17T17:43:48Z
dc.date.available2023-12-06T09:42:49Z
dc.date.embargo2022-07-31
dc.date.issued2022
dc.description.wosFundingTextThis project received funding from the ECSEL Joint Undertaking (JU) under grant agreement No. 826610. The JU receives support from the European Union's Horizon 2020 research and innovation programme and Spain, Austria, Belgium, Czech Republic, France, Italy, Latvia, and Netherlands.
dc.identifier.doi10.1145/3546790.3546802
dc.identifier.eisbn978-1-4503-9789-6
dc.identifier.issnna
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/43157
dc.publisherASSOC COMPUTING MACHINERY
dc.source.beginpageArt. 12
dc.source.conferenceInternational Conference on Neuromorphic Systems (ICONS)
dc.source.conferencedateJUL 27-29, 2022
dc.source.conferencelocationKnoxville
dc.source.journalna
dc.source.numberofpages8
dc.subject.keywordsFRAMEWORK
dc.subject.keywordsDESIGN
dc.subject.keywordsMODEL
dc.title

An Event-driven Recurrent Spiking Neural Network Architecture for Efficient Inference on FPGA

dc.typeProceedings paper
dspace.entity.typePublication
imec.validator.reasonA new document was uploaded from CORE.
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