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Highly sensitive, low-power, 10-20Gb/s transimpedance amplifier based on cascaded CMOS inverter gain stages

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dc.contributor.authorRakowski, Michal
dc.contributor.authorIngels, Mark
dc.contributor.authorDe Meyer, Kristin
dc.contributor.authorSteyaert, Michiel
dc.contributor.authorAbsil, Philippe
dc.contributor.authorVan Campenhout, Joris
dc.contributor.imecauthorRakowski, Michal
dc.contributor.imecauthorIngels, Mark
dc.contributor.imecauthorDe Meyer, Kristin
dc.contributor.imecauthorAbsil, Philippe
dc.contributor.imecauthorVan Campenhout, Joris
dc.contributor.orcidimecIngels, Mark::0000-0003-1939-2422
dc.contributor.orcidimecVan Campenhout, Joris::0000-0003-0778-2669
dc.date.accessioned2021-10-22T04:59:52Z
dc.date.available2021-10-22T04:59:52Z
dc.date.issued2014
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/24419
dc.source.conferenceOptical Interconnects Conference 2014
dc.source.conferencedate4/05/2014
dc.source.conferencelocationSan Diego, CA USA
dc.title

Highly sensitive, low-power, 10-20Gb/s transimpedance amplifier based on cascaded CMOS inverter gain stages

dc.typeProceedings paper
dspace.entity.typePublication
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