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Optimizing the MOS capacitor design to study large area 2D-oxide interface

Date

2017
Meeting abstract
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dc.contributor.authorGaur, Abhinav
dc.contributor.authorLin, Dennis
dc.contributor.authorChiappe, Daniele
dc.contributor.authorAdelmann, Christoph
dc.contributor.authorVan Houdt, Jan
dc.contributor.authorMocuta, Dan
dc.contributor.authorHeyns, Marc
dc.contributor.authorRadu, Iuliana
dc.contributor.imecauthorGaur, Abhinav
dc.contributor.imecauthorLin, Dennis
dc.contributor.imecauthorAdelmann, Christoph
dc.contributor.imecauthorVan Houdt, Jan
dc.contributor.imecauthorHeyns, Marc
dc.contributor.imecauthorRadu, Iuliana
dc.contributor.orcidimecAdelmann, Christoph::0000-0002-4831-3159
dc.contributor.orcidimecVan Houdt, Jan::0000-0003-1381-6925
dc.contributor.orcidimecRadu, Iuliana::0000-0002-7230-7218
dc.date.accessioned2021-10-24T04:57:29Z
dc.date.available2021-10-24T04:57:29Z
dc.date.issued2017
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/28376
dc.identifier.urlhttp://www.ieeesisc.org/programs/2017_SISC_technical_program.pdf
dc.source.beginpage2.7
dc.source.conference48th IEEE Semiconductor Interface Specialists Conference - SISC
dc.source.conferencedate6/12/2017
dc.source.conferencelocationSan Diego, CA USA
dc.title

Optimizing the MOS capacitor design to study large area 2D-oxide interface

dc.typeMeeting abstract
dspace.entity.typePublication
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