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Hardware-based aging mitigation scheme for memory address decoder

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dc.contributor.authorKraak, Daniel
dc.contributor.authorAgbo, Innocent
dc.contributor.authorTaouil, Motta
dc.contributor.authorHamdioui, Said
dc.contributor.authorWeckx, Pieter
dc.contributor.authorCosemans, Stefan
dc.contributor.authorCatthoor, Francky
dc.contributor.imecauthorWeckx, Pieter
dc.contributor.imecauthorCosemans, Stefan
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.date.accessioned2021-10-27T11:44:57Z
dc.date.available2021-10-27T11:44:57Z
dc.date.embargo9999-12-31
dc.date.issued2019
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/33328
dc.identifier.urlhttps://ieeexplore.ieee.org/document/8791536
dc.source.beginpage1
dc.source.conference24th IEEE European Test Symposium (ETS)
dc.source.conferencedate2/05/2019
dc.source.conferencelocationBaden Baden Germany
dc.source.endpage6
dc.title

Hardware-based aging mitigation scheme for memory address decoder

dc.typeProceedings paper
dspace.entity.typePublication
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