Publication:
Vertical M1 routing-aware detailed placement for congestion and wirelength reduction in sub-10nm nodes.
Date
| dc.contributor.author | Debacker, Peter | |
| dc.contributor.author | Han, Kwangsoo | |
| dc.contributor.author | Kahng, Andrew | |
| dc.contributor.author | Lee, Hyein | |
| dc.contributor.author | Raghavan, Praveen | |
| dc.contributor.author | Wang, Lutong | |
| dc.contributor.imecauthor | Debacker, Peter | |
| dc.contributor.orcidimec | Debacker, Peter::0000-0003-3825-5554 | |
| dc.date.accessioned | 2021-10-24T04:02:39Z | |
| dc.date.available | 2021-10-24T04:02:39Z | |
| dc.date.embargo | 9999-12-31 | |
| dc.date.issued | 2017 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/28185 | |
| dc.identifier.url | https://dl.acm.org/citation.cfm?doid=3061639.3062338 | |
| dc.source.conference | 54th ACM/EDAC/IEEE Design Automation Conference - DAC | |
| dc.source.conferencedate | 18/06/2016 | |
| dc.source.conferencelocation | Austin, TX USA | |
| dc.title | Vertical M1 routing-aware detailed placement for congestion and wirelength reduction in sub-10nm nodes. | |
| dc.type | Proceedings paper | |
| dspace.entity.type | Publication | |
| Files | Original bundle
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| Publication available in collections: |