Publication:
Scheduling with Register Constraints for DSP Architectures
Date
| dc.contributor.author | Depuydt, Francis | |
| dc.contributor.author | Goossens, Gert | |
| dc.contributor.author | De Man, Hugo | |
| dc.contributor.imecauthor | De Man, Hugo | |
| dc.date.accessioned | 2021-09-29T12:40:55Z | |
| dc.date.available | 2021-09-29T12:40:55Z | |
| dc.date.issued | 1994 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/135 | |
| dc.source.beginpage | 95 | |
| dc.source.endpage | 120 | |
| dc.source.journal | Integration, The VLSI Journal | |
| dc.source.volume | 18 | |
| dc.title | Scheduling with Register Constraints for DSP Architectures | |
| dc.type | Journal article | |
| dspace.entity.type | Publication | |
| Files | ||
| Publication available in collections: |