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Influence of well profile and gate length on the ESD performance of a fully silicided 0.25 μm CMOS technology
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2 since deposited on 2021-09-30
Acq. date: 2025-10-23
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1932 since deposited on 2021-09-30
Acq. date: 2025-10-23
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2 since deposited on 2021-09-30
Acq. date: 2025-10-23
Views
1932 since deposited on 2021-09-30
Acq. date: 2025-10-23
Citations