Publication:

Is there a limit when the access resistance impact on the extraction of key GAA NS FETs devices parameters can (not) be avoided?

Date

2023
Journal article
https://doi.org/10.1016/j.sse.2023.108711
Simple item page Full metadata Statistics
 
dc.contributor.authorTahiat, A.
dc.contributor.authorCretu, B.
dc.contributor.authorVeloso, Anabela
dc.contributor.authorSimoen, E.
dc.contributor.imecauthorVeloso, Anabela
dc.date.accessioned2024-04-11T08:32:37Z
dc.date.available2024-02-05T17:09:52Z
dc.date.available2024-04-11T08:32:37Z
dc.date.issued2023
dc.identifier.doi10.1016/j.sse.2023.108711
dc.identifier.issn0038-1101
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/43495
dc.publisherPERGAMON-ELSEVIER SCIENCE LTD
dc.source.beginpageArt. 108711
dc.source.endpageN/A
dc.source.issueNovember
dc.source.journalSOLID-STATE ELECTRONICS
dc.source.numberofpages5
dc.source.volume209
dc.subject.keywordsNOISE
dc.title

Is there a limit when the access resistance impact on the extraction of key GAA NS FETs devices parameters can (not) be avoided?

dc.typeJournal article
dspace.entity.typePublication
Files
Publication available in collections:
Articles