Publication:

Unsupervised Pattern Classification for Dual-Layer EPE Characterization in Advanced Logic Devices

 
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.orcid#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.orcid0000-0003-3383-1049
cris.virtualsource.department55871977-a1e8-4e5d-8187-e3f80cce26f5
cris.virtualsource.departmentfde8acc8-8e4e-4d89-ab30-4c88dffc7f56
cris.virtualsource.orcid55871977-a1e8-4e5d-8187-e3f80cce26f5
cris.virtualsource.orcidfde8acc8-8e4e-4d89-ab30-4c88dffc7f56
dc.contributor.authorAnunciado, Roy
dc.contributor.authorNechaev, Konstantin
dc.contributor.authorvan Mierlo, Willem
dc.contributor.authorGuzella, Thiago
dc.contributor.authorHsia, Jeff
dc.contributor.authorSchoofs, Stijn
dc.contributor.authorSchelcher, Guillaume
dc.contributor.authorVan Der Sanden, Stefan
dc.date.accessioned2026-09-14T13:40:54Z
dc.date.available2026-09-14T13:40:54Z
dc.date.createdwos2026
dc.date.issued2026
dc.description.abstractThis work presents a simulation-driven pattern classification methodology tailored for multi-layer logic device applications. Leveraging aerial image data of both line-space and contact hole patterns, we demonstrate the approach on a two-layer stack. The methodology integrates data science techniques to extract and cluster similar patterns, enabling the identification of EPE-critical pattern groups. These critical pattern groups provide valuable insights for lithography process setup, inline monitoring, and advanced process control strategies.
dc.identifier.doi10.1109/asmc69324.2026.11551176
dc.identifier.isbn979-8-3315-8051-3
dc.identifier.issn1078-8743
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/60359
dc.language.isoeng
dc.provenance.editstepusergreet.vanhoof@imec.be
dc.publisherIEEE
dc.relation.ispartofseriesAdvanced Semiconductor Manufacturing Conference and Workshop-Proceedings
dc.source.beginpage1
dc.source.conference37th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC)
dc.source.conferencedate2026-05-11
dc.source.conferencelocationAlbany
dc.source.endpage5
dc.source.journal2026 37TH ANNUAL SEMI ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE, ASMC
dc.source.numberofpages5
dc.title

Unsupervised Pattern Classification for Dual-Layer EPE Characterization in Advanced Logic Devices

dc.typeProceedings paper
dspace.entity.typePublication
imec.internal.crawledAt2026-06-11
imec.internal.sourcecrawler
imec.internal.wosCreatedAt2026-09-13
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