Line width roughness mitigation in chemically amplified resist by post-litho processes

dc.contributor.author	Vaglio Pret, Alessandro
dc.contributor.author	Gronheid, Roel
dc.contributor.imecauthor	Vaglio Pret, Alessandro
dc.contributor.imecauthor	Gronheid, Roel
dc.date.accessioned	2021-10-18T22:38:40Z
dc.date.available	2021-10-18T22:38:40Z
dc.date.embargo	9999-12-31
dc.date.issued	2010
dc.identifier.issn	0167-9317
dc.identifier.uri	https://imec-publications.be/handle/20.500.12860/18125
dc.source.beginpage	1127
dc.source.endpage	1130
dc.source.issue	5_8
dc.source.journal	Microelectronic Engineering
dc.source.volume	87
dc.title	Line width roughness mitigation in chemically amplified resist by post-litho processes
dc.type	Journal article
dspace.entity.type	Publication
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