Publication:

Low power coarse-grained reconfigurable instruction set processor

Date

2003
Proceedings Paper
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dc.contributor.authorBarat, Francisco
dc.contributor.authorJayapala, Murali
dc.contributor.authorVander Aa, Tom
dc.contributor.authorDeconinck, Geert
dc.contributor.authorLauwereins, Rudy
dc.contributor.authorCorporaal, Henk
dc.contributor.imecauthorJayapala, Murali
dc.contributor.imecauthorVander Aa, Tom
dc.contributor.imecauthorLauwereins, Rudy
dc.contributor.orcidimecJayapala, Murali::0000-0001-7917-0149
dc.contributor.orcidimecVander Aa, Tom::0000-0002-1504-5266
dc.contributor.orcidimecLauwereins, Rudy::0000-0002-3861-0168
dc.date.accessioned2021-10-15T03:59:57Z
dc.date.available2021-10-15T03:59:57Z
dc.date.embargo9999-12-31
dc.date.issued2003
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/7178
dc.source.beginpage29
dc.source.conferenceProgram Acceleration through Application and Architecture driven Code Transformations - PA3CT
dc.source.conferencedate22/09/2003
dc.source.conferencelocationEdegem Belgium
dc.source.endpage31
dc.title

Low power coarse-grained reconfigurable instruction set processor

dc.typeProceedings paper
dspace.entity.typePublication
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