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Guest editors' introduction: Design & test of a high-volume 3D-stacked graphics processor with high-bandwidth memory
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Guest editors' introduction: Design & test of a high-volume 3D-stacked graphics processor with high-bandwidth memory
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Date
2017-01
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APA
Chicago
Harvard
IEEE
Basic data
APA
Chicago
Harvard
IEEE
Author(s)
Marinissen, Erik Jan
;
Zorian, Yervant
Journal
IEEE Design & Test
Abstract
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1931
since deposited on 2021-10-24
1
last month
Acq. date: 2025-12-15
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Metrics
Views
1931
since deposited on 2021-10-24
1
last month
Acq. date: 2025-12-15
Citations