Publication:
Towards a Computationally Efficient Verilog-A Defect-Centric BTI Compact Model for Circuit Aging Simulations
| cris.virtual.department | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| cris.virtual.department | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| cris.virtual.department | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| cris.virtual.department | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| cris.virtual.department | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| cris.virtual.orcid | 0000-0002-0356-0973 | |
| cris.virtual.orcid | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| cris.virtual.orcid | 0000-0002-1016-8654 | |
| cris.virtual.orcid | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| cris.virtual.orcid | 0000-0002-1484-4007 | |
| cris.virtualsource.department | 5d1a73c2-f82f-43a0-9af2-32fb15f176bf | |
| cris.virtualsource.department | 34c59f3a-5b4c-42cc-aac3-f7242ce5bdf6 | |
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| cris.virtualsource.department | de93b028-9708-4f3a-99f0-5edbf35f1ef2 | |
| cris.virtualsource.department | 812f2909-a81b-4593-9b32-75331cffa35c | |
| cris.virtualsource.orcid | 5d1a73c2-f82f-43a0-9af2-32fb15f176bf | |
| cris.virtualsource.orcid | 34c59f3a-5b4c-42cc-aac3-f7242ce5bdf6 | |
| cris.virtualsource.orcid | 60ce54ef-35ba-48e5-a960-8f77078d8828 | |
| cris.virtualsource.orcid | de93b028-9708-4f3a-99f0-5edbf35f1ef2 | |
| cris.virtualsource.orcid | 812f2909-a81b-4593-9b32-75331cffa35c | |
| dc.contributor.author | Sangani, Dishant | |
| dc.contributor.author | Claes, Dieter | |
| dc.contributor.author | Weckx, Pieter | |
| dc.contributor.author | Kaczer, Ben | |
| dc.contributor.author | Gielen, Georges | |
| dc.date.accessioned | 2026-01-29T10:14:17Z | |
| dc.date.available | 2026-01-29T10:14:17Z | |
| dc.date.createdwos | 2025-10-18 | |
| dc.date.issued | 2025 | |
| dc.description.abstract | Complex physics-based models have been developed with the capability to capture typical BTI features like recovery, time-dependent variability and long-term saturation. However, for a successful EDA compact model, other practical criteria like stability (convergence) and computational efficiency are just as important as those functional features. In this paper, we perform a study a previously published Verilog-A based BTI model from the perspective of practical feasibility. To that end, (i) we analyze the computational performance of the BTI model, and (ii) we achieve an optimal trade-off between accuracy and computational efficiency with a newly proposed methodology for reducing the number of traps. | |
| dc.identifier.doi | 10.1109/IRPS48204.2025.10983507 | |
| dc.identifier.isbn | 979-8-3315-0478-6 | |
| dc.identifier.issn | 1541-7026 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/58755 | |
| dc.language.iso | eng | |
| dc.provenance.editstepuser | greet.vanhoof@imec.be | |
| dc.publisher | IEEE | |
| dc.source.beginpage | N/A | |
| dc.source.conference | 2025 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM, IRPS | |
| dc.source.conferencedate | 2025-03-30 | |
| dc.source.conferencelocation | Monterey | |
| dc.source.journal | 2025 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM, IRPS | |
| dc.source.numberofpages | 6 | |
| dc.title | Towards a Computationally Efficient Verilog-A Defect-Centric BTI Compact Model for Circuit Aging Simulations | |
| dc.type | Proceedings paper | |
| dspace.entity.type | Publication | |
| imec.identified.status | Library | |
| imec.internal.crawledAt | 2025-10-22 | |
| imec.internal.source | crawler | |
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