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Analytic variability study of inference accuracy in RRAM arrays with a binary tree winner-take-all circuit for neuromorphic applications

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dc.contributor.authorDoevenspeck, Jonas
dc.contributor.authorDegraeve, Robin
dc.contributor.authorCosemans, Stefan
dc.contributor.authorRoussel, Philippe
dc.contributor.authorVerhoef, Bram
dc.contributor.authorLauwereins, Rudy
dc.contributor.authorDehaene, Wim
dc.contributor.imecauthorDoevenspeck, Jonas
dc.contributor.imecauthorDegraeve, Robin
dc.contributor.imecauthorCosemans, Stefan
dc.contributor.imecauthorRoussel, Philippe
dc.contributor.imecauthorVerhoef, Bram
dc.contributor.imecauthorLauwereins, Rudy
dc.contributor.imecauthorDehaene, Wim
dc.contributor.orcidimecRoussel, Philippe::0000-0002-0402-8225
dc.contributor.orcidimecLauwereins, Rudy::0000-0002-3861-0168
dc.date.accessioned2021-10-25T18:19:07Z
dc.date.available2021-10-25T18:19:07Z
dc.date.embargo9999-12-31
dc.date.issued2018
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/30648
dc.identifier.urlhttps://ieeexplore.ieee.org/document/8486860
dc.source.beginpage62
dc.source.conference48th European Solid-State Device Research Conference - ESSDERC
dc.source.conferencedate3/09/2018
dc.source.conferencelocationDresden Germany
dc.source.endpage65
dc.title

Analytic variability study of inference accuracy in RRAM arrays with a binary tree winner-take-all circuit for neuromorphic applications

dc.typeProceedings paper
dspace.entity.typePublication
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