Publication:
Stacked nanosheet fork architecture for SRAM design and device co-optimization toward 3nm
Date
| dc.contributor.author | Weckx, Pieter | |
| dc.contributor.author | Ryckaert, Julien | |
| dc.contributor.author | Putcha, Vamsi | |
| dc.contributor.author | De Keersgieter, An | |
| dc.contributor.author | Boemmels, Juergen | |
| dc.contributor.author | Schuddinck, Pieter | |
| dc.contributor.author | Jang, Doyoung | |
| dc.contributor.author | Yakimets, Dmitry | |
| dc.contributor.author | Garcia Bardon, Marie | |
| dc.contributor.author | Ragnarsson, Lars-Ake | |
| dc.contributor.author | Raghavan, Praveen | |
| dc.contributor.author | Kim, Ryan Ryoung han | |
| dc.contributor.author | Spessot, Alessio | |
| dc.contributor.author | Verkest, Diederik | |
| dc.contributor.author | Mocuta, Anda | |
| dc.contributor.imecauthor | Weckx, Pieter | |
| dc.contributor.imecauthor | Ryckaert, Julien | |
| dc.contributor.imecauthor | Putcha, Vamsi | |
| dc.contributor.imecauthor | De Keersgieter, An | |
| dc.contributor.imecauthor | Boemmels, Juergen | |
| dc.contributor.imecauthor | Schuddinck, Pieter | |
| dc.contributor.imecauthor | Jang, Doyoung | |
| dc.contributor.imecauthor | Yakimets, Dmitry | |
| dc.contributor.imecauthor | Garcia Bardon, Marie | |
| dc.contributor.imecauthor | Ragnarsson, Lars-Ake | |
| dc.contributor.imecauthor | Kim, Ryan Ryoung han | |
| dc.contributor.imecauthor | Spessot, Alessio | |
| dc.contributor.imecauthor | Verkest, Diederik | |
| dc.contributor.orcidimec | Putcha, Vamsi::0000-0003-1907-5486 | |
| dc.contributor.orcidimec | De Keersgieter, An::0000-0002-5527-8582 | |
| dc.contributor.orcidimec | Ragnarsson, Lars-Ake::0000-0003-1057-8140 | |
| dc.contributor.orcidimec | Verkest, Diederik::0000-0001-6567-2746 | |
| dc.date.accessioned | 2021-10-24T18:44:57Z | |
| dc.date.available | 2021-10-24T18:44:57Z | |
| dc.date.issued | 2017 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/29917 | |
| dc.identifier.url | http://ieeexplore.ieee.org/document/8268430/ | |
| dc.source.beginpage | 505 | |
| dc.source.conference | IEEE International Electron Devices Meeting - IEDM | |
| dc.source.conferencedate | 2/12/2017 | |
| dc.source.conferencelocation | San Francisco, CA USA | |
| dc.source.endpage | 508 | |
| dc.title | Stacked nanosheet fork architecture for SRAM design and device co-optimization toward 3nm | |
| dc.type | Proceedings paper | |
| dspace.entity.type | Publication | |
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