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Wafer-to-wafer hybrid bonding at 400-nm interconnect pitch

 
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.orcid0000-0002-9332-9336
cris.virtual.orcid0000-0003-3013-4846
cris.virtual.orcid0000-0002-3096-050X
cris.virtualsource.departmentbf82d6f7-08da-4539-bdf6-c201ad29bfed
cris.virtualsource.departmentbe6b8a3f-f8cb-463e-ab2f-9520f3b1a954
cris.virtualsource.department67066e7b-3582-42ef-b040-694dc2e501ae
cris.virtualsource.orcidbf82d6f7-08da-4539-bdf6-c201ad29bfed
cris.virtualsource.orcidbe6b8a3f-f8cb-463e-ab2f-9520f3b1a954
cris.virtualsource.orcid67066e7b-3582-42ef-b040-694dc2e501ae
dc.contributor.authorChew, Soon Aik
dc.contributor.authorDe Vos, Joeri
dc.contributor.authorBeyne, Eric
dc.date.accessioned2026-06-15T14:20:48Z
dc.date.available2026-06-15T14:20:48Z
dc.date.createdwos2025-12-02
dc.date.issued2024
dc.description.abstractWafer-to-wafer hybrid bonding is an attractive 3D integration technology for stacking multiple heterogeneous chips with high 3D interconnect density. We highlight recent design and technology innovations that enable hybrid Cu, SiCN-to-Cu and SiCN bonding with interconnect pitches down to an unprecedented 400 nm.
dc.identifier.doi10.1038/s44287-024-00019-8
dc.identifier.issn2948-1201
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/59720
dc.language.isoeng
dc.provenance.editstepusergreet.vanhoof@imec.be
dc.publisherSPRINGERNATURE
dc.source.beginpage71
dc.source.endpage72
dc.source.issue2
dc.source.journalNATURE REVIEWS ELECTRICAL ENGINEERING
dc.source.numberofpages2
dc.source.volume1
dc.title

Wafer-to-wafer hybrid bonding at 400-nm interconnect pitch

dc.typeEditorial material
dspace.entity.typePublication
imec.internal.crawledAt2026-04-07
imec.internal.sourcecrawler
imec.internal.wosCreatedAt2026-04-07
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