Publication:

An 820 μW 9b 40MS/s noise-tolerant dynamic SAR ADC in 90nm digital CMOS

Date

2008-02
Proceedings Paper
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dc.contributor.authorGiannini, Vito
dc.contributor.authorNuzzo, Pierluigi
dc.contributor.authorChironi, Vincenzo
dc.contributor.authorBaschirotto, Andrea
dc.contributor.authorVan der Plas, Geert
dc.contributor.authorCraninckx, Jan
dc.contributor.imecauthorVan der Plas, Geert
dc.contributor.imecauthorCraninckx, Jan
dc.contributor.orcidimecVan der Plas, Geert::0000-0002-4975-6672
dc.contributor.orcidimecCraninckx, Jan::0000-0002-3980-0203
dc.date.accessioned2021-10-17T07:15:30Z
dc.date.available2021-10-17T07:15:30Z
dc.date.issued2008-02
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/13768
dc.source.beginpage238
dc.source.conferenceIEEE International Solid-State Circuits Conference - ISSCC
dc.source.conferencedate3/02/2008
dc.source.conferencelocationSan Francisco, CA USA
dc.source.endpage239
dc.title

An 820 μW 9b 40MS/s noise-tolerant dynamic SAR ADC in 90nm digital CMOS

dc.typeProceedings paper
dspace.entity.typePublication
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