Publication:
Activity profile driven simultaneous Vt assignment and power switch sizing for leakage power minimization in nanometer CMOS designs
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1870 since deposited on 2021-10-18
1last month
Acq. date: 2026-01-25
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Views
1870 since deposited on 2021-10-18
1last month
Acq. date: 2026-01-25
Citations