Publication:

Activity profile driven simultaneous Vt assignment and power switch sizing for leakage power minimization in nanometer CMOS designs

Date

Loading...
Thumbnail Image

Abstract

Description

Metrics

Views

1866 since deposited on 2021-10-18
Acq. date: 2025-10-23

Citations

Metrics

Views

1866 since deposited on 2021-10-18
Acq. date: 2025-10-23

Citations