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Wafer-level packaging technology for extended global wiring and inductors

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dc.contributor.authorCarchon, Geert
dc.contributor.authorCarbonell, Laure
dc.contributor.authorJenei, Snezana
dc.contributor.authorVan Hove, Marleen
dc.contributor.authorDecoutere, Stefaan
dc.contributor.authorDe Raedt, Walter
dc.contributor.authorMaex, Karen
dc.contributor.authorBeyne, Eric
dc.contributor.imecauthorDecoutere, Stefaan
dc.contributor.imecauthorDe Raedt, Walter
dc.contributor.imecauthorMaex, Karen
dc.contributor.imecauthorBeyne, Eric
dc.contributor.orcidimecDecoutere, Stefaan::0000-0001-6632-6239
dc.contributor.orcidimecDe Raedt, Walter::0000-0002-7117-7976
dc.contributor.orcidimecBeyne, Eric::0000-0002-3096-050X
dc.date.accessioned2021-10-15T04:05:45Z
dc.date.available2021-10-15T04:05:45Z
dc.date.issued2003
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/7278
dc.source.beginpage103
dc.source.conference33rd European Solid-State Devices Research Conference - ESSDERC
dc.source.conferencedate16/09/2003
dc.source.conferencelocationEstoril Portugal
dc.source.endpage106
dc.title

Wafer-level packaging technology for extended global wiring and inductors

dc.typeProceedings paper
dspace.entity.typePublication
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