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Mask enhancer technology on ArF immersion tool for 45nm-node CMOS with 0.249μm² SRAM contact layer fabrication

dc.contributor.authorYuito, Takashi
dc.contributor.authorWiaux, Vincent
dc.contributor.authorVan Look, Lieve
dc.contributor.authorVandenberghe, Geert
dc.contributor.authorIrie, Shigeo
dc.contributor.authorMatsuo, Takahiro
dc.contributor.authorMisaka, Akio
dc.contributor.authorEndo, Masayuki
dc.contributor.authorSasago, Masaru
dc.date.accessioned2021-10-16T07:25:23Z
dc.date.available2021-10-16T07:25:23Z
dc.date.issued2005
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/11599
dc.sourceIIOimport
dc.titleMask enhancer technology on ArF immersion tool for 45nm-node CMOS with 0.249μm² SRAM contact layer fabrication
dc.typeProceedings paper
dc.contributor.imecauthorWiaux, Vincent
dc.contributor.imecauthorVan Look, Lieve
dc.contributor.imecauthorVandenberghe, Geert
dc.contributor.orcidimecWiaux, Vincent::0000-0002-8923-5708
dc.source.peerreviewno
dc.source.beginpage14
dc.source.endpage15
dc.source.conferenceProceedings International Microprocess and Nanotechnology Conference
dc.source.conferencedate26/10/2005
dc.source.conferencelocationTokyo Japan
imec.availabilityPublished - imec


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