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dc.contributor.authorTremouilles, David
dc.contributor.authorThijs, Steven
dc.contributor.authorRuss, Christian
dc.contributor.authorSchneider, J.
dc.contributor.authorDuvvury, Charvarka
dc.contributor.authorCollaert, Nadine
dc.contributor.authorLinten, Dimitri
dc.contributor.authorScholz, Mirko
dc.contributor.authorJurczak, Gosia
dc.contributor.authorGossner, Harald
dc.contributor.authorGroeseneken, Guido
dc.date.accessioned2021-10-16T20:17:26Z
dc.date.available2021-10-16T20:17:26Z
dc.date.issued2007
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/12993
dc.sourceIIOimport
dc.titleUnderstanding the optimization of sub-45nm FinFET devices for ESD applications
dc.typeProceedings paper
dc.contributor.imecauthorThijs, Steven
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.imecauthorLinten, Dimitri
dc.contributor.imecauthorJurczak, Gosia
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.orcidimecThijs, Steven::0000-0003-2889-8345
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.contributor.orcidimecLinten, Dimitri::0000-0001-8434-1838
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage408
dc.source.endpage415
dc.source.conferenceEOS/ESD Symposium Proceedings
dc.source.conferencedate16/09/2007
dc.source.conferencelocationAnaheim, CA USA
imec.availabilityPublished - open access


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