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dc.contributor.authorVos, Rita
dc.contributor.authorArnauts, Sophia
dc.contributor.authorBovie, Inge
dc.contributor.authorOnsia, Bart
dc.contributor.authorGaraud, Sylvain
dc.contributor.authorXu, Kaidong
dc.contributor.authorYu, HongYu
dc.contributor.authorKubicek, Stefan
dc.contributor.authorRohr, Erika
dc.contributor.authorSchram, Tom
dc.contributor.authorVeloso, Anabela
dc.contributor.authorConard, Thierry
dc.contributor.authorLeunissen, Peter
dc.contributor.authorMertens, Paul
dc.date.accessioned2021-10-16T21:34:53Z
dc.date.available2021-10-16T21:34:53Z
dc.date.issued2007
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/13202
dc.sourceIIOimport
dc.titleChallenges with respect to high-k/metal gate stack etching and cleaning
dc.typeProceedings paper
dc.contributor.imecauthorVos, Rita
dc.contributor.imecauthorArnauts, Sophia
dc.contributor.imecauthorOnsia, Bart
dc.contributor.imecauthorKubicek, Stefan
dc.contributor.imecauthorSchram, Tom
dc.contributor.imecauthorVeloso, Anabela
dc.contributor.imecauthorConard, Thierry
dc.contributor.imecauthorMertens, Paul
dc.contributor.orcidimecConard, Thierry::0000-0002-4298-5851
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage275
dc.source.endpage283
dc.source.conferencePhysics and Technology of High-k Dielectrics
dc.source.conferencedate7/10/2007
dc.source.conferencelocationWashington, DC USA
imec.availabilityPublished - open access
imec.internalnotesECS Trans.; Vol. 11, iss. 4


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