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High density 3D die stacking without through-Si-vias: ultra thin chip embedding as enabling technology

dc.contributor.authorBeyne, Eric
dc.contributor.authorIker, Francois
dc.contributor.authorSoussan, Philippe
dc.contributor.authorFunaya, Takuo
dc.contributor.authorVanfleteren, Jan
dc.contributor.authorCotrin Teixeira, Ricardo
dc.contributor.authorTorfs, Tom
dc.contributor.authorChristiaens, Wim
dc.date.accessioned2021-10-17T06:18:14Z
dc.date.available2021-10-17T06:18:14Z
dc.date.issued2008
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/13390
dc.sourceIIOimport
dc.titleHigh density 3D die stacking without through-Si-vias: ultra thin chip embedding as enabling technology
dc.typeProceedings paper
dc.contributor.imecauthorBeyne, Eric
dc.contributor.imecauthorSoussan, Philippe
dc.contributor.imecauthorVanfleteren, Jan
dc.contributor.imecauthorTorfs, Tom
dc.contributor.orcidimecBeyne, Eric::0000-0002-3096-050X
dc.contributor.orcidimecSoussan, Philippe::0000-0002-1347-6978
dc.contributor.orcidimecVanfleteren, Jan::0000-0002-9654-7304
dc.contributor.orcidimecTorfs, Tom::0000-0002-1302-3346
dc.source.peerreviewno
dc.source.conferenceSEMICON Europe: Advanced Packaging Conference
dc.source.conferencedate7/10/2008
dc.source.conferencelocationStuttgart Germany
imec.availabilityPublished - imec


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