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Multi-gate devices for the 32-nm node and beyond: advantages and issues

dc.contributor.authorGriffoni, Alessio
dc.contributor.authorSimoen, Eddy
dc.contributor.authorCollaert, Nadine
dc.contributor.authorClaeys, Cor
dc.contributor.authorPaccagnella, Alessandro
dc.contributor.authorMeneghesso, Gaudenzio
dc.date.accessioned2021-10-17T07:25:55Z
dc.date.available2021-10-17T07:25:55Z
dc.date.issued2008
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/13814
dc.sourceIIOimport
dc.titleMulti-gate devices for the 32-nm node and beyond: advantages and issues
dc.typeProceedings paper
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.source.peerreviewno
dc.source.beginpage15
dc.source.endpage16
dc.source.conference17th European Workshop on Heterostructure Technology - HETECH
dc.source.conferencedate3/11/2008
dc.source.conferencelocationVenice Italy
dc.identifier.urlhttp://www.hetech2008.org/
imec.availabilityPublished - imec


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