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Double-patterning decomposition, design compliance, and verification algorithms at 32nm hp

dc.contributor.authorTritchkov, Alex
dc.contributor.authorGlotov, Petr
dc.contributor.authorKomirenko, Sergey
dc.contributor.authorSahouria, Emile
dc.contributor.authorTorres, Andres
dc.contributor.authorSeoud, Ahmed
dc.contributor.authorWiaux, Vincent
dc.date.accessioned2021-10-17T11:25:23Z
dc.date.available2021-10-17T11:25:23Z
dc.date.issued2008
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/14580
dc.sourceIIOimport
dc.titleDouble-patterning decomposition, design compliance, and verification algorithms at 32nm hp
dc.typeProceedings paper
dc.contributor.imecauthorWiaux, Vincent
dc.source.peerreviewno
dc.source.beginpage71220S
dc.source.conferencePhotomask Technology 2008
dc.source.conferencedate6/10/2008
dc.source.conferencelocationMonterey, CA USA
imec.availabilityPublished - imec
imec.internalnotesSPIE Proceedings; Vol.7122


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