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dc.contributor.authorClaeys, Cor
dc.contributor.authorBargallo Gonzalez, Mireia
dc.contributor.authorEneman, Geert
dc.contributor.authorHikavyy, Andriy
dc.contributor.authorLoo, Roger
dc.contributor.authorSimoen, Eddy
dc.date.accessioned2021-10-17T21:36:52Z
dc.date.available2021-10-17T21:36:52Z
dc.date.issued2009
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/15107
dc.sourceIIOimport
dc.titleElectrical defect issues of hetero-epitaxy for advanced nanometric CMOS technologies
dc.typeProceedings paper
dc.contributor.imecauthorEneman, Geert
dc.contributor.imecauthorHikavyy, Andriy
dc.contributor.imecauthorLoo, Roger
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.orcidimecEneman, Geert::0000-0002-5849-3384
dc.contributor.orcidimecHikavyy, Andriy::0000-0002-8201-075X
dc.contributor.orcidimecLoo, Roger::0000-0003-3513-6058
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage3
dc.source.endpage8
dc.source.conference7th ISTC/CSTIC
dc.source.conferencedate19/03/2009
dc.source.conferencelocationShanghai China
imec.availabilityPublished - open access
imec.internalnotesECS Transactions; Vol. 18, nr. 1


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