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Double patterning OPC and design for 22nm to 16nm device nodes

dc.contributor.authorLucas, Kevin
dc.contributor.authorCork, Chris
dc.contributor.authorMiloslavsky, Alex
dc.contributor.authorLuk-Pat, Gerry
dc.contributor.authorLi, Xiaohai
dc.contributor.authorBarnes, Levi
dc.contributor.authorGao, Weimin
dc.contributor.authorWiaux, Vincent
dc.date.accessioned2021-10-18T00:16:30Z
dc.date.available2021-10-18T00:16:30Z
dc.date.issued2009
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/15762
dc.sourceIIOimport
dc.titleDouble patterning OPC and design for 22nm to 16nm device nodes
dc.typeProceedings paper
dc.contributor.imecauthorWiaux, Vincent
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.conference6th International Symposium on Immersion Lithography Extensions
dc.source.conferencedate22/10/2009
dc.source.conferencelocationPrague Czech Republic
imec.availabilityPublished - open access
imec.internalnotese-proceedings Sematech website


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