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Impact of advanced gate stack engineering on low frequency noise performances of planar bulk CMOS transistors

dc.contributor.authorMercha, Abdelkarim
dc.contributor.authorOkawa, H.
dc.contributor.authorAkheyar, Amal
dc.contributor.authorSimoen, Eddy
dc.contributor.authorNakabayashi, T.
dc.contributor.authorHoffmann, Thomas Y.
dc.date.accessioned2021-10-18T00:45:08Z
dc.date.available2021-10-18T00:45:08Z
dc.date.issued2009
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/15852
dc.sourceIIOimport
dc.titleImpact of advanced gate stack engineering on low frequency noise performances of planar bulk CMOS transistors
dc.typeProceedings paper
dc.contributor.imecauthorMercha, Abdelkarim
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.orcidimecMercha, Abdelkarim::0000-0002-2174-6958
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage277
dc.source.endpage280
dc.source.conference20th International Conference on Noise and Fluctuations - ICNF
dc.source.conferencedate14/06/2009
dc.source.conferencelocationPisa Italy
imec.availabilityPublished - open access
imec.internalnotesAIP Conference Proceedings; Vol. 1129


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