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Interlevel dielectric engineering for improved device performance in half-micron CMOS

dc.contributor.authorForester, Lynn
dc.contributor.authorCollins, Tom
dc.contributor.authorVan den Bosch, Geert
dc.contributor.authorMeynen, Herman
dc.contributor.authorCoenegrachts, Bart
dc.contributor.authorVan den hove, Luc
dc.date.accessioned2021-09-29T12:41:21Z
dc.date.available2021-09-29T12:41:21Z
dc.date.issued1994
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/159
dc.sourceIIOimport
dc.titleInterlevel dielectric engineering for improved device performance in half-micron CMOS
dc.typeProceedings paper
dc.contributor.imecauthorVan den Bosch, Geert
dc.contributor.imecauthorCoenegrachts, Bart
dc.contributor.imecauthorVan den hove, Luc
dc.contributor.orcidimecVan den Bosch, Geert::0000-0001-9971-6954
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage111
dc.source.endpage113
dc.source.conference11th VLSI Multilevel Interconnect Conference - VMIC
dc.source.conferencedate07/06/1994
dc.source.conferencelocationSanta Clara, CA USA
imec.availabilityPublished - open access


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