dc.contributor.author | Blomme, Pieter | |
dc.contributor.author | Rosmeulen, Maarten | |
dc.contributor.author | Cacciato, Antonio | |
dc.contributor.author | Kostermans, Maarten | |
dc.contributor.author | Vrancken, Christa | |
dc.contributor.author | Van Aerde, Steven | |
dc.contributor.author | Schram, Tom | |
dc.contributor.author | Debusschere, Ingrid | |
dc.contributor.author | Jurczak, Gosia | |
dc.contributor.author | Van Houdt, Jan | |
dc.date.accessioned | 2021-10-18T15:21:55Z | |
dc.date.available | 2021-10-18T15:21:55Z | |
dc.date.issued | 2010 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/16756 | |
dc.source | IIOimport | |
dc.title | Novel dual layer floating gate structure as enabler of fully planar flash memory | |
dc.type | Proceedings paper | |
dc.contributor.imecauthor | Blomme, Pieter | |
dc.contributor.imecauthor | Rosmeulen, Maarten | |
dc.contributor.imecauthor | Vrancken, Christa | |
dc.contributor.imecauthor | Van Aerde, Steven | |
dc.contributor.imecauthor | Schram, Tom | |
dc.contributor.imecauthor | Debusschere, Ingrid | |
dc.contributor.imecauthor | Jurczak, Gosia | |
dc.contributor.imecauthor | Van Houdt, Jan | |
dc.contributor.orcidimec | Rosmeulen, Maarten::0000-0002-3663-7439 | |
dc.contributor.orcidimec | Schram, Tom::0000-0003-1533-7055 | |
dc.contributor.orcidimec | Van Houdt, Jan::0000-0003-1381-6925 | |
dc.date.embargo | 9999-12-31 | |
dc.source.peerreview | no | |
dc.source.beginpage | 129 | |
dc.source.endpage | 130 | |
dc.source.conference | IEEE Symposium on VLSI Technology | |
dc.source.conferencedate | 15/06/2010 | |
dc.source.conferencelocation | Honolulu, HI USA | |
imec.availability | Published - open access | |