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Process and device design influence on the ESD performance of a fully silicided 0.25mm CMOS technology

dc.contributor.authorBock, Karlheinz
dc.contributor.authorRuss, Christian
dc.contributor.authorBadenes, Gonçal
dc.contributor.authorGroeseneken, Guido
dc.contributor.authorDeferm, Ludo
dc.date.accessioned2021-09-30T07:58:01Z
dc.date.available2021-09-30T07:58:01Z
dc.date.issued1997
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/1749
dc.sourceIIOimport
dc.titleProcess and device design influence on the ESD performance of a fully silicided 0.25mm CMOS technology
dc.typeProceedings paper
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.imecauthorDeferm, Ludo
dc.source.peerreviewno
dc.source.beginpage129
dc.source.endpage137
dc.source.conferenceProceedings of the ESD Forum; Berlin, October 1997.
dc.source.conferencelocation
imec.availabilityPublished - imec


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