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A novel low-voltage biasing scheme for double gate FBC achieving 5s retention and 10^16 endurance at 85°C
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A novel low-voltage biasing scheme for double gate FBC achieving 5s retention and 10^16 endurance at 85°C
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Date
2010
Proceedings Paper
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APA
Chicago
Harvard
IEEE
Basic data
APA
Chicago
Harvard
IEEE
Author(s)
Lu, Zhichao
;
Collaert, Nadine
;
Aoulaiche, Marc
;
De Wachter, Bart
;
De Keersgieter, An
;
Schwarzenbach, W.
;
Bonnin, O.
;
Bourdelle, K.K.
;
Nguyen, B.-Y.
;
Mazure, C.
;
Altimime, Laith
;
Jurczak, Gosia
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Views
1910
since deposited on 2021-10-18
1
last month
1
last week
Acq. date: 2026-01-09
Citations