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Test structures for characterization of thermal-mechanical stress in 3D stacked IC for analog design

dc.contributor.authorMinas, Nikolaos
dc.contributor.authorVan der Plas, Geert
dc.contributor.authorOprins, Herman
dc.contributor.authorYang, Yu
dc.contributor.authorOkoro, Chukwudi
dc.contributor.authorMercha, Abdelkarim
dc.contributor.authorTorregiani, Cristina
dc.contributor.authorPerry, Dan
dc.contributor.authorMarchal, Pol
dc.contributor.authorRakowski, Michal
dc.contributor.authorCherman, Vladimir
dc.date.accessioned2021-10-18T19:09:45Z
dc.date.available2021-10-18T19:09:45Z
dc.date.issued2010
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/17634
dc.sourceIIOimport
dc.titleTest structures for characterization of thermal-mechanical stress in 3D stacked IC for analog design
dc.typeProceedings paper
dc.contributor.imecauthorVan der Plas, Geert
dc.contributor.imecauthorOprins, Herman
dc.contributor.imecauthorMercha, Abdelkarim
dc.contributor.imecauthorRakowski, Michal
dc.contributor.imecauthorCherman, Vladimir
dc.contributor.orcidimecVan der Plas, Geert::0000-0002-4975-6672
dc.contributor.orcidimecOprins, Herman::0000-0003-0680-4969
dc.contributor.orcidimecMercha, Abdelkarim::0000-0002-2174-6958
dc.source.peerreviewyes
dc.source.beginpage140
dc.source.endpage144
dc.source.conference23rd IEEE International Conference on Microelectronic Test Structures - ICMTS
dc.source.conferencedate22/03/2010
dc.source.conferencelocationHiroshima Japan
imec.availabilityPublished - imec


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