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Interpretation of PBTI/ TDDB predicted lifetime based on trap characterization by TSCIS in Vth-adjusted transistors

dc.contributor.authorSahhaf, Sahar
dc.contributor.authorDegraeve, Robin
dc.contributor.authorSrividya, Vidya
dc.contributor.authorCho, Moon Ju
dc.contributor.authorKauerauf, Thomas
dc.contributor.authorGroeseneken, Guido
dc.date.accessioned2021-10-18T21:09:03Z
dc.date.available2021-10-18T21:09:03Z
dc.date.issued2010
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/17928
dc.sourceIIOimport
dc.titleInterpretation of PBTI/ TDDB predicted lifetime based on trap characterization by TSCIS in Vth-adjusted transistors
dc.typeProceedings paper
dc.contributor.imecauthorSahhaf, Sahar
dc.contributor.imecauthorDegraeve, Robin
dc.contributor.imecauthorGroeseneken, Guido
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage1078
dc.source.endpage1081
dc.source.conference48th Annual IEEE International Reliability Physics Symposium- IRPS
dc.source.conferencedate2/05/2010
dc.source.conferencelocationAnaheim, CA USA
imec.availabilityPublished - open access


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