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Impact of various test flows on the cost in 3D D2W stacking

dc.contributor.authorTaouil, Mottaqiallah
dc.contributor.authorHamdioui, Said
dc.contributor.authorMarinissen, Erik Jan
dc.date.accessioned2021-10-18T22:13:23Z
dc.date.available2021-10-18T22:13:23Z
dc.date.issued2010-11
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/18070
dc.sourceIIOimport
dc.titleImpact of various test flows on the cost in 3D D2W stacking
dc.typeProceedings paper
dc.contributor.imecauthorMarinissen, Erik Jan
dc.contributor.orcidimecMarinissen, Erik Jan::0000-0002-5058-8303
dc.source.peerreviewyes
dc.source.beginpage1
dc.source.conferenceIEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits - 3D-TEST
dc.source.conferencedate4/11/2010
dc.source.conferencelocationAustin, TX USA
imec.availabilityPublished - imec


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