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8Å Tinv gate-first dual channel technology achieving low-Vt high performance CMOS

dc.contributor.authorWitters, Liesbeth
dc.contributor.authorTakeoka, Shinji
dc.contributor.authorYamaguchi, Shinpei
dc.contributor.authorHikavyy, Andriy
dc.contributor.authorShamiryan, Denis
dc.contributor.authorCho, Moon Ju
dc.contributor.authorChiarella, Thomas
dc.contributor.authorRagnarsson, Lars-Ake
dc.contributor.authorLoo, Roger
dc.contributor.authorKerner, Christoph
dc.contributor.authorCrabbe, Yvo
dc.contributor.authorFranco, Jacopo
dc.contributor.authorTseng, Joshua
dc.contributor.authorWang, Wei-E
dc.contributor.authorRohr, Erika
dc.contributor.authorSchram, Tom
dc.contributor.authorRichard, Olivier
dc.contributor.authorBender, Hugo
dc.contributor.authorBiesemans, Serge
dc.contributor.authorAbsil, Philippe
dc.contributor.authorHoffmann, Thomas Y.
dc.date.accessioned2021-10-19T00:31:47Z
dc.date.available2021-10-19T00:31:47Z
dc.date.issued2010
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/18361
dc.sourceIIOimport
dc.title8Å Tinv gate-first dual channel technology achieving low-Vt high performance CMOS
dc.typeProceedings paper
dc.contributor.imecauthorWitters, Liesbeth
dc.contributor.imecauthorHikavyy, Andriy
dc.contributor.imecauthorChiarella, Thomas
dc.contributor.imecauthorRagnarsson, Lars-Ake
dc.contributor.imecauthorLoo, Roger
dc.contributor.imecauthorKerner, Christoph
dc.contributor.imecauthorFranco, Jacopo
dc.contributor.imecauthorSchram, Tom
dc.contributor.imecauthorRichard, Olivier
dc.contributor.imecauthorBender, Hugo
dc.contributor.imecauthorBiesemans, Serge
dc.contributor.imecauthorAbsil, Philippe
dc.contributor.orcidimecHikavyy, Andriy::0000-0002-8201-075X
dc.contributor.orcidimecChiarella, Thomas::0000-0002-6155-9030
dc.contributor.orcidimecRagnarsson, Lars-Ake::0000-0003-1057-8140
dc.contributor.orcidimecLoo, Roger::0000-0003-3513-6058
dc.contributor.orcidimecFranco, Jacopo::0000-0002-7382-8605
dc.contributor.orcidimecRichard, Olivier::0000-0002-3994-8021
dc.contributor.orcidimecSchram, Tom::0000-0003-1533-7055
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage181
dc.source.endpage182
dc.source.conferenceIEEE Symposium on VLSI Technology
dc.source.conferencedate15/06/2010
dc.source.conferencelocationHonolulu, HI USA
imec.availabilityPublished - imec


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