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Litho-process-litho for 2D 32nm hp LOGIC and DRAM double patterning

dc.contributor.authorWong, Patrick
dc.contributor.authorWiaux, Vincent
dc.contributor.authorVerhaegen, Staf
dc.contributor.authorVandenbroeck, Nadia
dc.date.accessioned2021-10-19T00:36:36Z
dc.date.available2021-10-19T00:36:36Z
dc.date.issued2010
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/18370
dc.sourceIIOimport
dc.titleLitho-process-litho for 2D 32nm hp LOGIC and DRAM double patterning
dc.typeProceedings paper
dc.contributor.imecauthorWong, Patrick
dc.contributor.imecauthorWiaux, Vincent
dc.contributor.imecauthorVandenbroeck, Nadia
dc.contributor.orcidimecWong, Patrick::0000-0003-3605-9680
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage76400I
dc.source.conferenceOptical Microlithography XXIII
dc.source.conferencedate21/02/2010
dc.source.conferencelocationSan Jose, CA USA
imec.availabilityPublished - open access
imec.internalnotesProceedings SPIE; Vol.7640


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