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dc.contributor.authorCrupi, Felice
dc.contributor.authorAlioto, Massimo
dc.contributor.authorFranco, Jacopo
dc.contributor.authorMagnone, Paolo
dc.contributor.authorKaczer, Ben
dc.contributor.authorGroeseneken, Guido
dc.contributor.authorMitard, Jerome
dc.contributor.authorWitters, Liesbeth
dc.contributor.authorHoffmann, Thomas Y.
dc.date.accessioned2021-10-19T12:59:40Z
dc.date.available2021-10-19T12:59:40Z
dc.date.issued2011
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/18756
dc.sourceIIOimport
dc.titleExperimental analysis of buried SiGe pMOSFETs from the perspective of aggressive voltage scaling
dc.typeProceedings paper
dc.contributor.imecauthorFranco, Jacopo
dc.contributor.imecauthorKaczer, Ben
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.imecauthorMitard, Jerome
dc.contributor.imecauthorWitters, Liesbeth
dc.contributor.orcidimecFranco, Jacopo::0000-0002-7382-8605
dc.contributor.orcidimecKaczer, Ben::0000-0002-1484-4007
dc.contributor.orcidimecMitard, Jerome::0000-0002-7422-079X
dc.source.peerreviewyes
dc.source.beginpage2249
dc.source.endpage2252
dc.source.conferenceIEEE International Symposium on Circuits and Systems - ISCAS
dc.source.conferencedate15/05/2011
dc.source.conferencelocationRio de Janeiro Brazil
imec.availabilityPublished - imec


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